It is common in a digital circuit to have microchips connected via digital interfaces. The digital interfaces have digital drivers that can introduce noise in the circuit. For example, fast transitions or signal edges on a signal transmitted between two microchips over a printed circuit board (PCB) trace connecting the microchips cause crosstalk or electromagnetic interference.
Most traditional digital drivers are similar or have the same layout as a. CMOS (complimentary metal-oxide-semiconductor) inverter circuit. A large PMOS (positively-doped metal-oxide-semiconductor, or p-type) transistor pulls up the line voltage during a rising edge, and a large NMOS (negatively-doped metal-oxide-semiconductor, or n-type) transistor pulls down the line voltage during a falling edge. The advantages to such a digital driver is that it is simple, small (very efficient in use of die area), and can handle fast switching speeds. However, there are several disadvantages to the inverter design. Although the traditional digital driver, based on inverter circuit design is generally fast, the edge speed is very sensitive to variations in temperature, power supply voltage, and manufacturing parameters. Transition times may exhibit a four-to-one or even five-to-one variation from one digital line driver to the next and in a digital driver under different operating conditions. Thus, the inverter design often has undesirable performance because of timing uncertainty, potentially very high di/di and large peak currents.
Traditional digital drivers are designed to match impedance of the driver circuit to the output line. FIG. 1 shows a traditional digital driver that uses the impedance-matching technique. The traditional digital driver 100 of FIG. 1 has an NMOS leg including an array of output transistors 120 referenced to G106, and an output signal line our 104 with an output signal generated in response to an input signal on input line IN102. As mentioned above, generally a large output transistor is used; in this case, the output transistor is multiple transistors to achieve more precise control of the output current. It will be understood that traditional digital driver 100 illustrates the basics of any traditional digital driver although many additional details related to control of the output slew rate or transition control may be added.
IN102 is the input signal line for the output transistor array 120. As illustrated, each individual output transistor (N120-0, N120-1, . . . , N120-N) of transistor array 120 is controlled by corresponding gate control logic 110 (CL110-0, CL110-1, . . . , CL110-N). Control logic 110 can be implemented in a variety of ways, as would be understood by those skilled in the art. Control signal B<N−1:0> controls which control logic elements 110 will turn on respective output transistors N120-0, . . . , N120-n to generate an output signal on output line OUT 104. The output current of the output signal is controlled by how many output transistors of the array are turned on. Thus as circumstances change the output can be changed to better match the impedance of the output line, which reduces output signal reflections.
Although impedance matching may be achieved with the traditional digital driver 100, the digital driver still has a poor response with respect to crosstalk and ground bounce. Additionally, it would be understood that the traditional digital driver 100 requires a significant number of components (resulting in processing expense), a large amount of integrated circuit (I/C) real-estate, and power consumption requirements that include wide ranges of current from the power supply. As the push toward higher-speed circuits increases, the exposure to crosstalk and interference problems increases because shorter transition times result in greater crosstalk and interference. As mentioned above, the traditional digital driver 100 is susceptible to the effects of the shorter transition times, even if signal reflection is reduced.
In addition to the crosstalk and interference problems, fast transitions require more transient current from the power supply. The transient current used by a digital driver circuit can be a significant factor in the performance of the interfacing microchips. Because the inductance of the power supply bond wires and leads combines with the inherent on-chip supply capacitance to create a resonant circuit undesirable high-frequency signals may be produced. If there is a fast rise time in transient supply current, or a sharp transient current the resonant circuit may be excited causing ringing on the supply voltages.
Thus, there are significant performance disadvantages to the traditional digital driver 100 based on the inverter design. The disadvantages discussed above result in power inefficiency and noise in the microchip. The disadvantages are increasingly significant in higher-speed microchips.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.